1. Field of the Invention
This invention relates generally to semiconductor manufacturing, and, more particularly, to a method and apparatus for predicting process excursions based upon analysis of tool state variables.
2. Description of the Related Art
The technology explosion in the manufacturing industry has resulted in many new and innovative manufacturing processes. Today's manufacturing processes, particularly semiconductor manufacturing processes, call for a large number of important steps. These process steps are usually vital, and therefore, require a number of inputs that are generally fine-tuned to maintain proper manufacturing control.
The manufacture of semiconductor devices requires a number of discrete process steps to create a packaged semiconductor device from raw semiconductor material. The various processes, from the initial growth of the semiconductor material, the slicing of the semiconductor crystal into individual wafers, the fabrication stages (etching, doping, ion implanting, or the like), to the packaging and final testing of the completed device, are so different from one another and specialized that the processes may be performed in different manufacturing locations that contain different control schemes.
Generally, a set of processing steps is performed across a group of semiconductor wafers, sometimes referred to as a lot. For example, a process layer composed of a variety of materials may be formed across a semiconductor wafer. Thereafter, a patterned layer of photoresist may be formed across the process layer using known photolithography techniques. Typically, an etch process is then performed across the process layer using the patterned layer of photoresist as a mask. This etching process results in the formation of various features or objects in the process layer. Such features may be used for a gate electrode structure for transistors. Many times, trench isolation structures are also formed across the substrate of the semiconductor wafer to isolate electrical areas across a semiconductor wafer. One example of an isolation structure that can be used is a shallow trench isolation (STI) structure. Typically, forming trenches across the semiconductor wafer and filling such trenches with an insulating material, such as silicon dioxide, form STI structures across the semiconductor wafers.
The manufacturing tools within a semiconductor manufacturing facility typically communicate with a manufacturing framework or a network of processing modules. Each manufacturing tool is generally connected to an equipment interface. The equipment interface is connected to a machine interface to which a manufacturing network is connected, thereby facilitating communications between the manufacturing tool and the manufacturing framework. The machine interface can generally be part of an advanced process control (APC) system. The APC system initiates a control script, which can be a software program that automatically retrieves the data needed to execute a manufacturing process.
FIG. 1 illustrates a typical semiconductor wafer 105. The semiconductor wafer 105 typically includes a plurality of individual semiconductor die 103 arranged in a grid 150. Using known photolithography processes and equipment, a patterned layer of photoresist may be formed across one or more process layers that are to be patterned. As part of the photolithography process, an exposure process is typically performed by a stepper on approximately one to four die 103 at several locations at a time, depending on the specific photomask employed. The patterned photoresist layer can be used as a mask during etching processes, wet or dry, performed across the underlying layer or layers of material, e.g., a layer of polysilicon, metal or insulating material, to transfer the desired pattern to the underlying layer. The patterned layer of photoresist is comprised of a plurality of features, e.g., line-type features or opening-type features that are to be replicated in an underlying process layer.
The health of a processing tool (tool health) may vary during wafer-processing performed by the processing tool. The tool health may relate to an assessment of how well the processing tool operates within a predetermined specification, which may include specifications such as tool environment characteristics (e.g., tool temperature, humidity, and the like) and quality and accuracy of the process performed by the processing tool. Excursions in the tool health may occur and adversely affect the quality of processed semiconductor wafers 105. Furthermore, a tool model that controls and monitors the operations performed by the processing tool may not detect some excursions in the tool health, which may cause a variation in the semiconductor wafers processed by the processing tool.
Turning now to FIG. 2, a flow chart depiction of a prior art process flow that includes monitoring the tool health of a processing tool is illustrated. A manufacturing system processes one or more semiconductor wafers 105 (block 210). The manufacturing system may then acquire tool state data relating to the processing tool during the processing of semiconductor wafers 105 (block 220). The tool state data may include the pressure, the humidity, the temperature, the gas flow rate, etc., relating to the processing chamber associated with a processing tool. Upon analysis of the tool state data, a design-of-experiment may be performed to analyze the tool health (block 230).
The design-of-experiment may include performing an experiment related to a particular tool state variable, such as the pressure in a process chamber, and modifying the tool state variable (e.g., pressure) to examine how such modification affects the overall tool health (block 240). The design-of-experiment may be used to analyze the changes brought about by the design-of-experiment and how it affects a model, such as a tool model, used to model, control, and/or monitor the operation of a processing tool (block 250). Upon examination of the effect(s) of the design-of-experiment on a processing tool model, the manufacturing system may adjust one or more manufacturing variables (e.g., pressure, temperature, humidity, gas flow rate, etc.) to compensate or adjust the operation of the processing tool to perform manufacturing processes in a more accurate and efficient fashion (block 260).
Among the problems associated with the current methodology include the fact that the design-of-experiment utilizes a large amount of resources within a manufacturing environment. Performing a design-of-experiment to analyze the affect on a tool health model requires a large amount of planning, and requires the use of a great deal of processing tool time. Furthermore, designing certain experiments, such as experimentation with zone temperatures and other faults, are difficult to simulate and/or study. Additionally, a lack of knowledge of the processing tool health and the effects of certain manufacturing variables on a processing tool model may cause a processing tool to drift. This drift may cause a variance or degradation in the overall quality and efficiency of wafers processing.
The present invention is directed to overcoming, or at least reducing, the effects of, one or more of the problems set forth above.